Coma FW-C2800 User's Guide Page 174

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Timers, Interrupts, and the System Clock
Thread Scheduling 4-69
When the CLK Manager is enabled on the C6000 platform, the timer counter
register is incremented every four CPU cycles. When the CLK Manager is
enabled on the C5400 platform, the timer counter is decremented at the
following rate, where CLKOUT is the DSP clock speed in MIPS (see the
Global Settings Property dialog in the TMS320 DSP/BIOS API Reference
Guide for your platform) and TDDR is the value of the timer divide-down
register as shown in the following equation.
When this register reaches 0 on the C5400 and C2800 platform, or the value
set for the period register on the C6000 platform, the counter is reset. On the
C5400 and C2800, it is reset to the value in the period register. On the C6000,
it is reset to 0. At this point, a timer interrupt occurs. When a timer interrupt
occurs, the HWI object for the selected timer runs the CLK_F_isr function,
which causes these events to occur:
The low-resolution time is incremented by 1 on the C6000, C2800, and
C5000 platforms.
All the functions specified by CLK objects are performed in sequence in
the context of that ISR.
Therefore, the low-resolution clock ticks at the timer interrupt rate and the
clock’s time is equal to the number of timer interrupts that have occurred. To
obtain the low-resolution time, you can call CLK_getltime from your
application code.
The CLK functions performed when a timer interrupt occurs are performed in
the context of the hardware interrupt that caused the system clock to tick.
Therefore, the amount of processing performed within CLK functions should
be minimized and these functions can invoke only DSP/BIOS calls that are
allowable from within an HWI.
Note:
CLK functions should not call HWI_enter and HWI_exit as these are called
internally when DSP/BIOS runs CLK_F_isr. Additionally, CLK functions
should not use the interrupt keyword or the INTERRUPT pragma in C
functions.
CLKOUT / (TDDR + 1)
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